1. Technical Field
The present disclosure herein relates to semiconductor devices and, more particularly, to three-dimensional resistive random access memory (3D RRAM) devices, methods of operating the same and methods of fabricating the same.
2. Description of Related Art
Three-dimensional integrated circuit (3D-IC) memory technologies have been proposed in an effort to increase the capacity of semiconductor memory devices. In various 3D-IC memory technology configurations, a plurality of memory cells are arranged in three dimensions. While fine-pattern technologies or multi-level cell (MLC) technologies have been considered in the furtherance of higher integration of memory devices, such fine-pattern technologies are commonly associated with ever-higher fabrication costs, and MLC technologies carry with them certain limitations in increasing the number of data bits which can be stored in a single memory cell. Accordingly, 3D-IC memory technology approaches have become attractive as candidates of process design technologies for achieving increased memory capacity.
Recently, ‘punch-and-plug’ technology has been proposed as an example of 3D-IC memory technologies capable of greatly increasing memory capacity. Such punch-and-plug technology involves sequentially stacking a plurality of thin layers on a substrate and forming plugs that penetrate the plurality of thin layers.